The present invention relates generally to integrated circuit (IC) design, and more particularly to a method for protecting the core circuitry of an integrated circuit (IC) from damage that may be caused by electrostatic discharge (ESD).
A gate oxide of any metal-oxide-semiconductor (MOS) transistor, in an integrated circuit, is most susceptible to damage. The gate oxide may be destroyed by being contacted with a voltage only a few volts higher than supply voltage. It is understood that a regular supply voltage is 5.0, 3.3, 3.1 volts, or lower. Electrostatic voltages from common environmental sources can easily reach thousands, or even tens of thousands of volts. Such voltages are destructive even though the charge and any resulting current are extremely small. So, it is of critical importance to discharge any static electric charge, as it builds up, before it accumulates to a damaging voltage.
ESD is only a concern to an integrated circuit before it is installed into a larger circuit assembly, such as a printed circuit board (PCB), and before the PCB is connected to an operating power. This susceptible period includes production, storage, transport, handling, and installation. After the power is supplied, the power supplies and the structures can easily absorb or dissipate electrostatic charges.
ESD protection circuitry is typically added to ICs at the bond pads. The pads are the connections to the IC, to or from outside circuitry, for all electric power supplies, electric grounds, and electronic signals. Such added circuitry must allow normal operation of the IC. That means that the protection circuitry is effectively isolated from the normally operating core circuitry because it blocks current flow through itself to ground or any other circuit or pad. In an operating IC, electric power is supplied to a VCC pad, electric ground is supplied to a VSS pad, electronic signals are supplied from outside to some pads, and electronic signals generated by the core circuitry of the IC are supplied to other pads for delivery to external circuits and devices. In an isolated, unconnected IC, all pads are considered to be electrically floating, or of indeterminant voltage. In most cases, that means that the pads are at ground, or zero voltage.
ESD can arrive at any pad. This can happen, for embodiment, when a person touches some of the pads on the IC. This is the same static electricity that may be painfully experienced by a person who walks across a carpet on a dry day and then touches a grounded metal object. In an isolated IC, ESD acts as a brief power supply for one or more pads, while the other pads remain floating, or grounded. Because the other pads are grounded, when ESD acts as a power supply at a randomly selected pad, the protection circuitry acts differently than it does when the IC is operating normally. When an ESD event occurs, the protection circuitry must quickly become current conductive so that the electrostatic charge is conducted to VSS ground and thus dissipated before damaging voltage builds up.
ESD protection circuitry, therefore, has two states. In a normally operating IC, ESD protection circuitry appears invisible to the IC by blocking current through itself and, thus, having no effect on the IC. In an isolated, unconnected IC, ESD protection circuitry serves its purpose of protecting the IC by conducting an electrostatic charge quickly to VSS ground before a damaging voltage can build up.
What is always desirable is an improved ESD protection circuit.